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Vishal Saxena

Associate Professor

About Vishal Saxena

Prof. Saxena’s research encompasses analog electronic and photonic integrated circuits (ICs).  The unifying theme of his research is to sustain advances in IC design in the post-Moore scaling era through integration of novel technologies with standard CMOS. These include hybrid CMOS photonic ICs for high-speed optical interconnects used in data center connectivity, CMOS/BiCMOS RF photonic ICs for next-generation wireless systems, circuits using emerging nonvolatile memory (NVM) devices for realizing neuromorphic and Edge-AI circuits for obtaining energy-efficient embedded intelligence. His completed research projects include high-speed analog-to-digital converters, continuous-time delta-sigma modulators, phase-locked loops and low-power sensor interfaces.

Dr. Saxena received the B. Tech. in Electrical Engineering from the Indian Institute of Technology Madras, India in 2002, and the M.S. and Ph.D. degrees in Electrical and Computer Engineering (ECE) from Boise State University in 2007 and 2010 respectively. From 2010 to 2016, he was an Assistant and then Associate Professor in the ECE Department at Boise State University. From 2016 to 2019, he was the Micron Endowed Professor of Microelectronics in the ECE department at University of Idaho. Since Fall 2019, he has been with the ECE department at the University of Delaware. He has also held engineering positions in the semiconductor and telecommunication industry.

Dr. Saxena’s research has been supported by industry and federal agencies including NSF, AFOSR, DARPA, and NASA. Dr. Saxena received the 2015 NSF CAREER, 2016 AFOSR Young Investigator Program (YIP) award, and 2019 DARPA Young Faculty Award (YFA). He also received Keysight faculty research award and Idaho’s Accomplished under 40 (AU40) award in 2016. He has given several invited talks, including TEDx, on his research and taught tutorials at international conferences including IEEE MWSCAS, SOCC, and ICASSP. He is a member of the IEEE, ACM, Eta Kappa Nu and Tau Beta Phi. He has been an Associate Editor for the IEEE Transactions on Circuits and Systems-II: Express Briefs. Presently, he is serving on the steering committee for the IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), VLSI committee of the IEEE International Symposium on Circuits and Systems (ISCAS).

Office: DuPont 110B
Phone: 302-831-4365